13+ 3 Input And Gate Pin Diagram

13+ 3 Input And Gate Pin Diagram. Specify by appending suffix letter x to the ordering code. Power dissipation in still air, plastic dip+ soic package+.

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Pin connection and iec logic symbols. The assignment is in the wrong direction and i'm not sure that nand commutes in the way that you need it to for 3 inputs, hence the use of and for the inputs and then not to invert. Typically, standard logic gates are available in 14 pin or 16 pin dil (dual in line) chips.

This feature allows the use of this device in a mixed 3.3 v and 5 v environment.

13+ 3 Input And Gate Pin Diagram. The input can be driven from either 3.3 v or 5 v devices. Pin 7 is ground and pin 14 is +vcc supply where again +vcc supply where again +svdc is the normal and maximum supply. 10 — 19 july 2017. Status package type package pins package eco plan (1) drawing qty (2).

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